ANSI/SCTE 137-1 2017 (R2021)

Modular Headend Architecture Part 1: DOCSIS Timing Interface

The requirements for timing and synchronization of the DOCSIS system come from the following areas:

  • Existing DOCSIS Specification & ATP Requirements
  • Remote PHY System Requirements
  • Implementation Requirements
  • Emerging Services like T-Services and wireless

These requirements place definitions and constraints on the use of the 10.24 MHz DOCSIS master clock and the DOCSIS timestamp, which is delivered in the SYNC message. The DOCSIS standard [RFI2] originally envisioned the M-CMTS Core, EQAMs, and upstream receive functions on one assembly, fed with a common clock. The timestamp counter resided in the M-CMTS Core function.

The M-CMTS™ Remote PHY architecture may result in three components: the M-CMTS CORE, the upstream receiver, and the EQAM being located in a different chassis, and potentially at different physical locations. As a system, the three components comply with the DOCSIS standard [RFI2] and any existing CMTS equipment.

The DOCSIS Timing Protocol (DTI) defined in this document supports the accurate and robust transport of the DTI server 10.24 MHz master clock, 32-bit DOCSIS timestamp, and Time of Day, to the DTI client within the DOCSIS M-CMTS cable network. The DTI protocol is structured to minimize the complexity and cost of the DTI client clocks, and the per port cost of the shared server function while supporting all S-CDMA and TDMA timing requirements.